Herein, it was fabricated with 8Gb density 1Xnm half-pitch FE-RAM and its operation was confirmed. Unlike the conventional FE-RAM operations where maximizes 2Pr by adjusting the plate voltage according to data, this research showed that memory operation with low voltage of 0.6V and fixed plated voltage by using the anti-ferroelectric of 5nm-thick ultra-thin HZO. The switching speed of FE-RAM was measured by changing the write time from 5ns to 80ns. It was confirmed that more than 70% of total cell operate under 20ns tWR (DRAM operation speed), but the 30% of them responds to a wide range of write time between 20 and 65ns. To improve the switching speed, it is essential to remove defects in HZO that hinder the domain wall motion.