Advanced Memory Package Architecture

Advanced Memory Package Architecture is a research domain dedicated to developing package structures, stacking methodologies, interconnects, thermal management solutions, and reliability technologies for next-generation high-performance memory. This field addresses the growing demand for memory with high storage capacity and low latency, critical for system performance in AI, HPC, data centers, and high-end GPU/ASIC markets. Technologies such as HB (High Bandwidth) Memory, HBM (Memory Package), and HBF (stacked memory) are becoming increasingly vital, surpassing traditional DDR/LPDDR-centric architectures. The core focus of this research area extends beyond simply stacking memory chips; it aims to simultaneously optimize bandwidth, capacity, thermal characteristics, stack height, TSV (Through-Silicon Via) density, bonding pitch, and package reliability. Furthermore, to achieve diverse market needs ranging from mobile to server and new AI architectures, the research actively develops the VFO (Vertical Fan-Out) platform. VFO is defined as a cost-effective alternative to TSV-based stacking. It achieves significant form factor reduction, surpassing the limits of conventional wire-bonding, and provides a scalable, optimized memory solution for all AI market segments.

Next-Generation HBM Package Architecture

• Increasing the number of stacked layers in HBM stacks.
• Scaling TSV pitch and TSV density.
• Transitioning from micro-bump-based structures to hybrid bonding-based structures.
• Optimizing the functionality of the HBM base die for logic layer die.
• Designing the stacking, thermal dissipation, and heat paths considering heat dissipation.

HBF Memory Package Architecture

• Designing the optimal stacking structure for HBF memory stacks.
• Researching vertical interconnect architectures between HBF dies.
• Analyzing package-level signal integrity and power integrity.
• Researching multi-stack architectures for increased capacity.
• Analyzing thermal bottlenecks in HBF packages and designing cooling paths.

Scalable Memory Package Architecture

• Developing optimized VFO solutions for Mobile, Server, and New AI Architecture markets.
• Implementing TSV-less high-density vertical interconnects to maximize bandwidth and capacity with cost efficiency.
• Designing advanced package structures that minimize footprint and enhance signal integrity for on-device AI.
• Validating ultra-thin multi-die stacking (e.g., 8-high) and thermal reliability for high-density packages.