[Preview] Structural and Device Considerations for Vertical Cross Point Memory with Single-stack memory toward CXL Memory beyond 1xnm 3DXP
Since the first commercialization of the 3D XPoint (3DXP), it has gained increasing attention as a new class of memory between DRAM and NAND based on its high capacity, low latency, and byte-addressability. The 3DXP product has provided high capacity with its 4F2 footprint and 2z nm scale feature size. However, it is expected that further scaling of 3DXP will face limitations in either vertical deck-by-deck stacking or lateral shrink due to process and cost issues.
At the 2022 IMW, we will propose the 3D structure of the 3D vertical cross point memory (3DVXP) as the next-generation byte-addressable storage class memory (SCM). We will demonstrate the advantage and the feasibility of the selectable memory, based on memory-selector duality, for the application of the 3DVXP. In our paper, quantitative analysis of device operation was performed to understand the effects of parasitic resistance, capacitance, and cell density. Also discussed is the most important technology elements such as the ‘poly-Si vertical transistor’ and the requirement for the current drivability to satisfy 3DVXP operations. Furthermore, the challenges of 3DVXP are discussed as a further research topic.
We believe that the 3DVXP technology with an innovative 3D structure and cell stacks can potentially extend the roadmap of storage class memory further than the current scalability of the 3DXP technology.
The publication: Link

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