As Moore's law has reached its limits, the application of a heterogeneous 3D IC has emerged. In particular, wafer-to-wafer hybrid bonding is emerging as a core technology for 3D integration. So far, hybrid bonding has only been commercialized for CIS or NAND, and not for DRAM products.

At the ECTC 2022, we shared the applicability of hybrid wafer bonding to commercialized DRAM products for the first time. Conventional DRAM chip operation was successfully verified with wafer-to-wafer hybrid bonding. An extra metal layer was applied to pre-fabricated DRAM wafers to demonstrate the use of hybrid bonding to stack two wafers. Then, the TSV-last process with BEOL metallization was carried out. Finally, no degradation of DRAM operation or cell characteristics was confirmed during low temperature hybrid bonding and subsequent processes.

In this paper, we confirmed that the application of hybrid bonding can be extended to commercially-available DRAM. Based on this research, it is expected that the wafer-to-wafer hybrid bonding technology can be applied not only to DRAM but also to 3D PKG products in various areas including MRAM and PRAM.

Subsequent research is being conducted to reduce the pad pitch of hybrid bonding to a sub-um level to secure a higher interconnection density. To that end, robust bonding and precise overlay control at a high Cu pad density will be required, and cutting-edge integration technology will be applied.