This work presents a holistic co-optimization of 3D ferroelectric NAND (FeNAND) for energy-efficient and high-throughput analog computation-in-memory. The co-optimization covers cell properties, non-cell peripherals, and computational schemes. Our approach enhances multi-level capability through write algorithm tuning, reduces word-line transition power, and improves analog multiply-and-accumulate efficiency via in-page pipelining and splitting. As a result, computational throughput and energy efficiency of 3D FeNAND are improved by up to 16× and 4950×, respectively, compared to conventional 2D arrays.