In this letter, the relaxation oscillation (RO) effect of the Ovonic Threshold Switch (OTS) on the RESET (amorphous)-to-Set (crystalline) characteristics of Phase-change memory (PCM) is discussed. RO, which happens when the current flowing through the OTS is below hold current ( Ih) , may increase the minimum SET current and the fail bit rate (FBR) of RESET-to-SET transition in the Cross-point structure PCM (XP-PCM). The RO from the single XP-PCM cell was successfully measured using a low capacitance (low-z) probe and a high frequency oscilloscope, and the corresponding current oscillation is calculated from the voltage, discharge time, and write current. The voltage RO was proportionally increased as the applied current was decreased below the hold current of the OTS ( Ih) . The increasing RO behaviors were well matched with the increasing FBR of RESET-to-SET transition in the 64k bit array. The results indicate that the current oscillation not only makes the current supply for the crystallization unstable to generate SET fail but may even induce the partial amorphization (RESET) due to the series o