Due to the recent rapid growth of Large Language Model (LLM)-based Generative AI, the need for efficient semiconductor technology with low power, low cost, and high capacity is increasing. Analog-Computation in Memory (ACiM) which is a non-volatile memory (NVM) that enables simultaneous computation and data storage, emerges as an energy-efficient AI accelerator for the next generation of computing, and has attracted great attention in academia and industry in recent years.

In this study, as a leading research group of Emerging NVM, to overcome the problems in performing analog compute based on Resistive Synaptic Cell (RSC) device, we established a holistic co-optimization ACiM infrastructure which takes consideration of device properties, device operations, large array formation and circuit compensation. (Fig 1)

We presented this study result at IEDM (International Electron Devices Meeting) 2023 which is held at California San Francisco, US on 9^th to 13^th December 2023. It was SK hynix’s first ACiM topic presentation at the major conference, and by this chance, we can monitor industry response and global interest in ORP.

Fig 1. Holistic co-optimization methodology

First, in order to optimize the properties of ReRAM devices, a buffer layer and a heat-reinforced layer were inserted between electrodes and ReRAM material to prevent diffusion at the interface. As a result, the relaxation and conductance delta is improved by 49% and 65% respectively (Fig. 2).

Fig 2. Cell engineering

Secondly, in order to obtain exquisite analog weight values, optimization of Program and Verify (PnV) scheme is essential to minimize circuit overhead. Most intermediate weights were used in 1T1R-based ACiM 4-bit inference operations. Therefore, the reliability of intermediate weights significantly affects system performance. For the proposed depression-end scheme, dramatic improvements were observed in the middle region over time. In addition, the noise cancelling scheme showed an improvement in relaxation values by about 90% as an effect of elimination of unstable voids and electrons that causes deviations around the filament (Fig 3). 

Fig 3. Characterization (Beyond Cell engineering): Linearity comparison and noise canceling

Lastly, we applied engineering techniques in terms of CMOS platforms and circuits to reduce external or parasitic resistance components other than cells. It was found that both MAC linearity and accuracy were improved through the application of the IR drop mitigation scheme. Furthermore, we were able to improve the inference accuracy of CIFAR-10 (Canadian Institute for Advanced Research, 10 classes) by 124% compared to base scheme, even in situations that reflect realistic retention results. In conclusion, ACiM performance improvement was confirmed through the comprehensive evaluation platform and methodology at the wafer-level (Fig 4).

Fig 4. Holistic platform for accuracy improvement

Emerging memory-based ACiM technology can provide many opportunities for next-generation computing. In particular, there are various methods of system integration using heterogeneous integration products which have scalability. SK hynix RTC will also work hard to preemptively secure semiconductor technologies with new concepts while predicting the next generation of computing methods that will emerge in the future.

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